The present invention relates to a comparison circuit which includes a differential amplifier comprising darlington-connected bipolar transistors.
A comparison circuit including a differential amplifier comprised of darlington-connected bipolar transistors, as shown in FIG. 1, is known. This differential amplifying circuit includes differential amplifier DA which is comprised of darlington-connected pnp transistors Q01 and Q03, and darlington-connected pnp transistors Q02 and Q04.
Constant-current source A for supplying current Il is connected to the emitters of transistors Q01 and Q02. Constant-current sources B and C are respectively connected to the emitters of transistors Q03 and Q04, and supply identical current I2, so as to minimize the offset voltage of the comparator.
First and second input signals V1 and V2 are respectively supplied to the bases of transistors Q04 and Q03. The collectors of npn transistors Q05 and Q06 constituting current mirror circuit CMA are respectively connected to the collectors of transistors Q01 and Q02. The base of transistor Q07 is connected to the collector of transistor Q05. The collector of transistor Q07 is connected to power source terminal Vcc via load resistor RL, and its emitter is grounded.
This comparison circuit compares first and second input signals V1 and V2 with each other. When the value of input signal V1 is higher than that of input signal V2, transistor Q03 is rendered more conductive than transistor Q04, and hence transistor Q01 is turned on and transistor Q02 is turned off.
Since no current flows through transistor Q06, current mirror circuit CMA constituted by transistors Q05 and Q06 is turned off. The current flowing through transistor Q01 flows into the base of transistor Q07, and turns it on. Then, if the value of load resistor RL is set to an adequate level, the voltage value of output signal Vout is set at substantially the ground level, i.e., at "L" level.
When the value of input signal V1 is lower than that of input signal V2, transistor Q04 is rendered more conductive than transistor Q03, and hence transistor Q02 is turned on and transistor Q01 is turned off. Accordingly, since a current flows through transistor Q06, the same amount of current flowing through transistor Q06 flows through transistor Q05. As a result, transistor Q05 prevents the current from flowing through the base of transistor Q07, resulting in transistor Q07 being turned off. Thus, output voltage Vout is pulled up by load resistor RL, and reaches a value substantially equivalent to that of power source Vcc, i.e., "H" level.
When input signal V1 or V2 is 0 (V), transistors Q05 and Q06, serving as an active load, can be operated normally, since the input stages of input signals V1 and V2 are constituted by the darlington-connected transistors. The lower limit of the voltage range of the input signals within which the comparison circuit can be operated normally is -Vf. In this case, reference symbol Vf denotes a voltage across the base and emitter of each of transistors Q01 to Q04 when they are rendered conductive.
When the minimum voltage across constant-current source A, required for its operation, is Vmin, and input signals V1 and V2 are both higher than (Vcc-Vmin-2 Vf), the voltage between the terminals of constant-current source A drops to lower than Vmin, and hence constant-current source A cannot be operated normally. Consequently, the comparison circuit cannot be operated normally. More specifically, upper limit V0 of the input signals within which the comparison circuit can be operated normally is given as: EQU V0=Vcc-Vmin-2Vf
When one of the input signals is lower than (Vcc-Vmin-2Vf), the upper limit of the other signal is Vcc. When the input stage of the comparison circuit is constituted by the darlington-connected transistors, in this manner, the lower limit of the input signals can be lowered to -Vf, but the upper limit is restricted to (Vcc-Vmin-2Vf).